W5100S-L
The image is for illustrative purposes only; please refer to the product data sheet for precise specifications.
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| Part Number | W5100S-L |
|---|---|
| Manufacturer |
 WIZnet
|
| Description | Ethernet Controller 10/100 Base-T/TX PHY SPI Interface 48-LQFP |
| Product Group | Ethernet Controller |
| MOQ | 2000 pcs |
| SPQ | 2000 pcs |
| Figure/Case | 48-LQFP |
| Package | T&R Pack |
 PDF Datasheet | |
| Ship From | Hong Kong |
| Shipment Way | DHL / Fedex / TNT / UPS / Others |
| Delivery Term | Ex-Works |
| Send RFQ | sales@signalhk.com |
| Feature | Specification |
| Manufacturer | WIZnet |
| Product Series | W5100S |
| Function | Hardwired TCP/IP Embedded Ethernet Controller |
| Supported Protocols | TCP, UDP, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE, Wake-on-LAN over UDP |
| Number of Sockets | 4 independent hardware sockets |
| Network Data Buffer | 16 KB internal memory for TX and RX buffers |
| Host Interface Options | - High-Speed SPI (Modes 0 and 3, up to 70 MHz) |
| - Parallel System Bus with 2 address signals and 8-bit data | |
| Ethernet PHY | Integrated 10Base-T / 100Base-TX Ethernet PHY |
| Auto-Negotiation | Supports full and half duplex modes for 10 Mbps and 100 Mbps |
| Auto-MDIX | Supported (only in Auto-Negotiation mode) |
| Wake-on-LAN (WOL) | Supported over UDP |
| Power Management Features | - Ethernet Power Down Mode |
| - Main Clock Gating for power saving | |
| Supply Voltage | 3.3V operation with 5V I/O signal tolerance |
| Operating Temperature Range | -40°C to +85°C |
| Package Type | 48-pin LQFP (7x7 mm, 0.5 mm pitch) |
| Special Features | - Supports SOCKET-less commands: ARP-Request, PING-Request |
| - Does not support IP fragmentation | |
| - Does not maintain ARP-cache table | |
| - LED outputs for Full/Half Duplex, Link, 10/100 Speed, Active |
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W5100S-L
W5100S-L